Computer System Architecture MCQ - Pipeline and Vector Processing

26 Which of the following systems is a most likely candidate example of a pipe and filter architecture?

In the pipes and filters pattern, components are filters and connectors are pipes.
Each filter takes input in some form and produces output in some other form,which may or may not be similar to the input form. Hopefully, each filter will add value to the output stream because of processing done inside the filter. Each filter is independent and is unaware of the up and down stream filters. Pipes are conduits of the data streams. Famous example of the pipes and filters architectural pattern are UNI X shells,signal processing systems and distributed systems

27 The following are some events that occur after a device controller issues an interrupt while process L is under execution.
(P) The processor pushes the process status of L onto the control stack.
(Q) The processor finishes the execution of the current instruction.
(R) The processor executes the interrupt service routine.
(S) The processor pops the process status of L from the control stack.
(T) The processor loads the new PC value based on the interrupt.
Which one of the following is the correct order in which the events above occur?

Processor required to handle the interrupt:
1. Processor finishes the execution of the current instruction.
2. Processor pushes the process status of L onto the control stack.
3. Processor loads the new PC value based on the interrupt.
4. Processor executes the interrupt service routine.
5. Processor pops the process status of “L” from the control stack.

28 When an interrupt occurs, an operating system

It depends on scheduler. It may decides that the interrupted process will complete execution or some other process will be executed.

29 A processor needs software interrupt to

A processor needs software interrupt to obtain system services which need execution of privileged instructions.

30 A device employing INTR line for device interrupt puts the CALL instruction on the data bus while

A device employing INTR line for device interrupt puts the CALL instruction on the data bus while INTA is active