Computer System Architecture - Digital Logic Circuits - Sequential Circuit

Avatto > > UGC NET COMPUTER SCIENCE > > PRACTICE QUESTIONS > > Computer System Architecture > > Digital Logic Circuits - Sequential Circuit

1. When the maximum clock rate is quoted for a logic family, then it applies to a

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2. The number of flip-flops required in a modulo N counter is

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3. Flip-flop outputs are always

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4. How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in.

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5. The clear data and present input of the JK lip-lop are known as

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