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Computer System Architecture MCQ - Central Processing Unit

51 A processor has 40 distinct instructions and 24 general purpose registers. A 32-bit instruction word has an opcode, two register operands and an immediate operand. The number of bits available for the immediate operand field is .............

52 Which of the most appropriate match for the items in the first column with the items in the second column

List-I	List-II
X. Indirect Addressing	I. Array implementation
Y. Indexed Addressing	II. Writing re-locatable code
Z. Base Register Addressing	III. Passing array as parameter

Indexed addressing is used for array implementation.
Base register is used to relocatable code.
Indirect addressing is done when array is passed as parameter.

53 The absolute addressing mode

Absolute addressing mode means address of operand is given in the instruction.

54 Which of the following is/are true of the auto increment addressing mode ?
1. It is useful in creating self relocating code
2. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation
3. The amount of increment depends on the size of the data item accessed.

Auto increment add mode is basically used for incrementing a data. It depends on size of data.

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Question:

A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2’s complement numbers 01001101…

A. 1, 1, 0
B. 1, 0, 0
C. 0, 1, 0
D. 1, 0, 1

Correct answer: B

Explanation:

100110110 (in 2's complement ignore carry bit so ignore 1 at msb) After carry bit is ignored the value at msb is 0 means number is positive so…

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