Computer System Architecture - Memory Hierarchy
61. The total size of address space in a virtual memory system is limited by
- Option : B
- Explanation : Virtual memory concept is independent of size of main memory and depends only on the availability of the secondary storage.
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- Option : C
- Explanation : Memory cycle time = 64 ns
Memory is refreshed 100 times per msec.
Number of refreshes in 1 memory cycle (i.e in 64 ns)
= (100 * 64 * 10 – 9)/10 – 3 = 64 * 10 – 4.
Time taken for each refresh = 100 ns
Time taken for 64 * 10 – 4 refreshes
= 64 * 10 – 4 * 100 * 10-9 sec
= 64 * 10 – 11 sec.
Percentage of the memory cycle time used for refreshing :
= (Time taken to refresh in 1 memory cycle/ Total time) * 100
= (64 * 10 – 11/64 * 10 – 9) * 100
= 1 %
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63. Increasing the RAM of a computer typically improves performance because
- Option : C
- Explanation : As size increase, page frame increase. If we apply any replacement rule which is not cause ‘blady anamoly’ is always reduce page fault.
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64. How many 32K × 1 RAM chips are needed to provide a memory capacity of 256 K-bytes?
- Option : C
- Explanation : Number of chips required = 256*1024*8/32*1024*1 = 64
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- Option : D
- Explanation : Main memory unit has capacity = 4 MB
Number of DRAM chips = 4MB/ 1M*1bit = 32
1 DRAM chip has 1 K (210) rows and 1 K(210) cells
In each row = 32 * 210 * 210 = 32 * 220
Time taken in one refresh opn
= 100 ns
Time required to perform one refresh operation on all the cells in MM unit
= 32 * 220 * 100 = 3200 * 220 ns
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