Classical

Computer Organization Architecture - Cache and main memory

1:   The memory address range to which RAM will respond
A. 0000 H to 1 FFF H
B. 0000 H to 5FFF H
C. 4000 H to 5FFF H
D. 3000 H to FFFF H
 
 

Option: C

Explanation :

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shanth said: (4:23am on Thursday 18th July 2013)
the answer is a not c. ram respond from 0000 to 0fff
karthick said: (10:18am on Wednesday 4th December 2013)
yes c is wrong. B is corect one
Pallavi said: (11:44pm on Thursday 19th January 2017)
anwer a is even not correct it is 0000 H to 0fff

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2:   How many addresses are required for 25 x 40 video RAM ?
A. 1020
B. 1920
C. 1000
D. 1500
 
 

Option: C

Explanation :

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ISHAN said: (12:27pm on Sunday 10th May 2015)
25 X 40=1000 address required

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3:   Which of the following is not a form of memory ?
A. Instruction cache
B. Instruction register
C. Instruction opcode
D. Both (a) and (b)
 
 

Option: C

Explanation :

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4:  

Which memory is difficult to interface with processor ?

A.

Static memory

B.

Dynamic memory

C.

ROM

D.

None of these

 
 

Option: B

Explanation :

Dynamic memory refreshes periodically so due to refreshment it is difficult to interface it. So answer is 'B'.

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ashok said: (1:53am on Thursday 21st February 2013)
why it is b
ashok said: (1:53am on Thursday 21st February 2013)
why it is b
laxman puligilla said: (3:29am on Wednesday 28th August 2013)
why not static memory?
laxman puligilla said: (3:29am on Wednesday 28th August 2013)
why not static memory?

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5:   Desirable characteristic(s) of a memory system is(are)
A. Speed and reliability
B. Low power consumption
C. Durability and compactness
D. All of these
 
 

Option: D

Explanation :

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Syllabus included in this section is-

  • Machine instructions and addressing modes
  • ALU and data-path
  • CPU control design
  • Memory interface
  • I/O interface (Interrupt and DMA mode)
  • Instruction pipelining
  • Cache and main memory
  • Secondary storage
  • Hardwired and Microprogrammed processor design
  • Instruction formats 
  • Addressing modes
  •  Memory types and organisation
  • Interfacing peripheral devices
  • Interrupts
  • Microprocessor architecture
  • Instruction set and Programming (8085, P-III/P-IV)
  • Microprocessor applications.

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