| A. | INTER |
| B. | RESET IN |
| C. | Both (a) and (b) |
| D. | READY |
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Option: D Explanation : Click on Discuss to view users comments. reshma perveen said: (7:27pm on Wednesday 2nd September 2015)
Ya,read is assigned with enable low input,as well as write and in ta are also having enable low.these three r active low pins.while inter,ale,hold,hlda are active high pins,so enable kept high,while set,reset acts on 0,1
Avinash A said: (12:34pm on Sunday 27th August 2017)
READY is an active high input control.It is used by microprocessor to detect whether a peripheral has completed ( or is ready) the data transfer or not .The main function of this pin is to synchronize slower peripheral to faster microprocessor.
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| A. | lower the HOLD input |
| B. | lower the READY input |
| C. | raise the HOLD input |
| D. | None of these |
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Option: B Explanation : Click on Discuss to view users comments. |
| A. | An operand and an address |
| B. | A decoder and an accumulator |
| C. | Sequence register and decoder |
| D. | None of these |
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Option: A Explanation : Click on Discuss to view users comments. |
| A. | Devices have 8-bit addresses |
| B. | Devices are accessed using IN and OUT instructions |
| C. | There can be a maximum of 256 input devices and 256 output devices |
| D. | Arithmetic and logic operations can be directly performed with the I/O data. |
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Option: D Explanation : Click on Discuss to view users comments. Avinash A said: (2:12pm on Sunday 27th August 2017)
Memory mapped IO uses 16bit address devices.Control signals used in memory mapped IO are MEMR(bar) MEMW(bar).All memory related instructions can be used in this.Data transfer between any register and IO.64K memory is shared between IO and system.Arithmetic or logical operations can be directly performed with IO data
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