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System Software and Operating System MCQ - Memory Management

11 Consider the following heap :
JOB1-50 FREE-150 JOB2-300 FREE-350 JOB3-600
The sequence of requests for blocks of sizes 300, 25, 125, 50 can be satisfied if we use

12 Cached and interleaved memories are ways of speeding up memory access between CPUs and slower RAM. Which memory models are best suited (i.e. improves performance the most) for which programs ?
(i) Cached memory is best suited for small loops.
(ii) Interleaved memory is best suited for small loops.
(iii) Interleaved memory is best suited for large sequential code.
(iv) Cached memory is best suited for large sequential code.

13 Consider following page trace :
4,3,2, 1,4,3,5,4,3,2, 1,5
Number of page faults that would occur if FIFO page replacement algorithm is used with Number of frames for the Job M=3, will be

When M-3

memory-management

Total Page Fault = 9

14 Consider following page trace :
4,3,2, 1,4,3,5,4,3,2, 1,5
Percentage of page faults that would occur if FIFO page replacement algorithm is used with
Number of frames for the Job M = 4, will be

When m=4

memory-management

Total no of page fault = 10

15 Consider a logical address space of 8 pages of 1024 words mapped into memory of 32 frames.
How many bits are there in the logical address?

Logical address will have 3 bits to specify the page number (for 8 pages). 10 bits to specify the offset into each page (2¹⁰ = 1024 words) = 13 bits.

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Day 3 / 10

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Question:

Consider a logical address space of 8 pages of 1024 words mapped into memory of 32 frames. How many bits are there in the logical address?

Answer:

Logical address will have 3 bits to specify the page number (for 8 pages). 10 bits to specify the offset into each page (210 = 1024 words) =…

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