Computer System Architecture - Digital Logic Circuits - Combinational Circuits

Avatto > > UGC NET COMPUTER SCIENCE > > PRACTICE QUESTIONS > > Computer System Architecture > > Digital Logic Circuits - Combinational Circuits

46. Which one of the following logic expression is incorrect?

Cancel reply

Your email address will not be published. Required fields are marked *


Cancel reply

Your email address will not be published. Required fields are marked *


47. The circuit shown in the figure is equivalent to? The circuit shown in the figure is equivalent to

Cancel reply

Your email address will not be published. Required fields are marked *


Cancel reply

Your email address will not be published. Required fields are marked *


48. The black box in the following figure consists of a minimum complexity circuit that uses only AND,OR and NOT gates. The function f (x,y,z) = 1 whenever x , y are different and 0 otherwise. In addition the 3 inputs x,y,z are never all the same value. Which of the following equation lead to the correct design for the minimum complexity circuit? The black box in the following figure consists of a minimum complexity circuit that uses only AND,OR and NOT gates. The function f (x,y,z) = 1 whenever x , y are different and 0 otherwise. In addition the 3 inputs x,y,z are never all the same value. Which of the following equation lead to the correct design for the minimum complexity circuit

Cancel reply

Your email address will not be published. Required fields are marked *


Cancel reply

Your email address will not be published. Required fields are marked *


49. If A ⊕ B = C, then

  • Option : D
  • Explanation : Mathematically, XOR is both associative and commutative ie. If C = A XOR B then B = C XOR A or B = A XOR C and and A = B XOR C A = C XOR B
Cancel reply

Your email address will not be published. Required fields are marked *


Cancel reply

Your email address will not be published. Required fields are marked *


50. To make the following circuit a tautology ? marked box should be To make the following circuit a tautology ? marked box should be

  • Option : C
  • Explanation : The output f = (x+x')+(y+y'). Starting derivation using 'f'. -->(x+x')+(y+y') -->(x+y)+(x'+y') -->(Already a known Input)+(x'+y') So, the unknown input is (x'+y'). This can be made by :- x and y fed into a NOT gate and then AND gate to become (x'+y'). So the answer is NAND gate.
Cancel reply

Your email address will not be published. Required fields are marked *


Cancel reply

Your email address will not be published. Required fields are marked *