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Digital Logic MCQ - Combinational Circuits

6 Odd parity of word can be conveniently tested by

7 Identify the logic function performed by the circuit shown in the given figure

Identify the logic function performed by the circuit shown in the given figure

8 Which one of the following will give the sum of full adders as output ?

9 The number of full and half-adders required to add 16-bit numbers is

The one half-adder can add the least significant bit of the two numbers. Full adders are required to add the remaining 15 bits as they all involve adding carries.

10 The time required for a pulse to decrease from 90 to 10 per cent of its maximum value is called

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Question:

What is the minimum number of two-input NAND gates used to perform the function of two input OR gate ?

A. one
B. two
C. three
D. four

Correct answer: C

Explanation:

Y=A+B. This is the equation of OR gate. We require 3 NAND gates to create OR gate. We can also write After 1st NAND operation Y = (A…

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