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1. When the maximum clock rate is quoted for a logic family, then it applies to a
shift register
flip-lop
counter
Multiplexer
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2. The number of flip-flops required in a modulo N counter is
log2 (N) + 1
log2(N-1)
log2 (N)
N log2 (N)
3. Flip-flop outputs are always
Complimentary
The same
Independent of each other
same as previous input
4. How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in.
6
3
2
1
5. The clear data and present input of the JK lip-lop are known as
Synchronous inputs
Directed inputs
Either (a) or (b)
None of these
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