Digital Logic

1:

In which of the following adder circuits, the carry look ripple delay is eliminated ?

A.

Half adder

B.

Full adder

C.

Parallel adder

D.

Carry-look-ahead adder

 

Answer : D

Explanation :

alfaz said: (9:53pm on Tuesday 1st October 2013)
it should be D option

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Option: A

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