The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?
| A. | NOT |
| B. | OR |
| C. | AND |
| D. | XOR |
Answer : C Explanation :
[ (a.b) '. (a.b) ' ] '= ((a.b)')' + ((a.b)')' |
|
|
Option: A Explanation : Explanation will come here. Explanation will come here. Explanation will come here. Explanation will come here. Explanation will come here. |
