Computer System Architecture - Memory Hierarchy

Consider a computer with a 4-ways set-associative mapped cache of the following characteristics : a total of 1 MB of main memory, a word size of 1 byte, a block size of 128 words and a cache size of 8 KB.

46. The number of bits in the TAG, SET and WORD fields, respectively are :

  • Option : D
  • Explanation : Size of main Memory = 1 MB = 220 byte
    Size of cache Memory = 8 KB
    Block Size = 128 words = 27
    memory-hierarchy
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Consider a computer with a 4-ways set-associative mapped cache of the following characteristics : a total of 1 MB of main memory, a word size of 1 byte, a block size of 128 words and a cache size of 8 KB.

47. While accessing the memory location 0C795H by the CPU, the contents of the TAG field of the corresponding cache line is

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48. Consider a 4-way set associative cache (initially empty) with total 16 cache blocks. The main memory consists of 256 blocks and the request for memory blocks is in the following order:
0, 255, 1, 4, 3, 8, 133, 159, 216, 129, 63, 8, 48, 32, 73, 92, 155
Which of the following memory block will NOT be in the cache if LRU replacement policy is used?

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49. Consider a machine with a byte addressable main memory of 220 bytes, block size of 16 bytes and a direct mapped cache having 212 cache lines. Let the addresses of two consecutive bytes in main memory be (E201F)16 and (E2020)16. What are the tag and cache line address (in hex) for main memory address (E201f)16?

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50. The size of the physical address space of a processor is 2P bytes. The word length is 2W bytes. The capacity of cache memory is 2N bytes, the size of each cache block is 2M words. For a K-way set- associative cache memory, the length (in number of bits) of the tag field is

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