PREVIOUS YEAR SOLVED PAPERS MCQ - GATE 2019

Correct AnswerOption D
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Given cache block size is 16 bytes, so block or word offset is 4 bits. Fully associative cache of size 16 kB, so line offset should be,
= cache size / block size
= 16 kB / 16 B = 1 k
= 1024
= 10 bits Line or Index Offset
Tag bit size would be,
= processor address size - (line offset + word offset)
= 32 - 10 - 4
= 18 bits tag size
Since, there no option matches, but if we assume that Line Offset is a part of Tag bits, therefore,
Tag bits = 18+10 = 28 bits
Line or Index offset = 0 bits (since fully associative cache memory),
Word or block offset = 4 bits
32 - bit
Tag offsetWord offset
28 bit4 bit
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Correct AnswerOption A
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Correct AnswerOption D
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LR parser is a bottom up parser. Hence it uses right most derivation in reverse order.
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Correct AnswerOption C
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+28 ⇒ 0000 0000 0001 1100
–28 ⇒ 1111 1111 1110 0100 (2’s complement form)
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Correct AnswerOption C
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A = {(x, X), x ∈ X and X ⊆ U}
The number of k element subsets of a set U with n elements = = nCk'
The number of possible ordered pairs (x, X) where x ∈ X is then 2n-1 Sets are possible so for all n elements total n ⋅ 2n-1 number of order pairs are possible.
thus statement I is true and
But since by the combinatoric identity

statement II is identity similar to statement I thus also true.
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