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Pipeline and Vector Processing Q.5

0. A 4-stage pipleline has the stage delays as 150, 120, 160 and 140 nanoseconds respectively. Registers that are used between the stages have a delay of 5 nanoseconds each. Assuming constant clocking rate, the total time taken to process 1000 data items on this pipeline will be

  • Option : B
  • Explanation : Delay is 5 nanosecond/stage.
    Total delay in pipeline = 150 + 120 + 160 + 140
    = 570
    Delay due to stage delay = 15
    Total delay = 585
    Total time taken = 1000 data item size/585ns
    = 165.5 microsecond
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