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Pipeline and Vector Processing Q.47

0. On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.
Initialize the address register
Initialize the count to 500
LOOP : Load a byte from device
Store in memory at address given by address register
Increment the address register
Decrement the court
If count ! = 0 go to LOOP
Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute it it is a non-load/store instruction. The load-store instructions take two clock cycles to execute.
The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DM controller requires 20 clock cycles for initialization and other overhead. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from interrupt driven program based input-output?

  • Option : A
  • Explanation : Interrupt driven transfer time
    = 1 + 1 + 500 * (2 + 2 + 1 + 1 + 1) = 3502
    DMA based transfer time = 20 + 500 * 2 = 1020
    Speedup = 3502/1020 = 3.4(approx.)
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