Nov2017 cs Q6

0. A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is:

  • Option : B
  • Explanation :
    Microprocessor instruction format, which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations.ie:
    Nov2017 cs
    F1,F2,F3 each having seven distinct micro-operation. So, 3 bits are required for each. Condition field have four status, it needs 2 bits for four different condition. Branch field have four option so,it needs 2 bits for four option. Now there are 128 different memory location, So, there 7 bits atre required for 128 diffeent location. Instruction Field:

    Nov2017 cs
    Total bits are 20. So, option (B) is correct.
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