Memory Hierarchy Q.84

84A 32-bit wide main memory unit with a capacity of 1 GB is built using 256 M × 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is 214. The time taken to perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closest integer) of the time available for performing the memory read/write operations in the main memory unit is ............

Option : C
Explanation : Given, total number of rows is 2¹⁴ and time taken to perform one refresh operation is 50 nanoseconds.
So, total time taken to perform refresh operation
= 2¹⁴ * 50 nanoseconds
= 819200 nanoseconds
= 0.819200 milliseconds.
But refresh period is 2 milliseconds.
So, time spent in refresh period in percentage
= (0.819200 milliseconds) / (2 milliseconds)
= 0.4096 = 40.96%
Hence, time spent in read/write operation
= 100% – 40.96% = 59.04% = 59
(in percentage and rounded to the closet integer).

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