DLCC Q.64
64
A full-adder is a logic circuit which can add two single order bits plus a carry in from a previous adder. Its incomplete truth table is given in the table below. The missing entry in the outputs for SUM and CARRY out are
Input | Outputs | ||||
A | A | B | Cin | Sum | CarryOUT |
0 | 0 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 1 | 1 | 0 |
0 | 0 | 1 | 0 | 1 | 0 |
0 | 0 | 1 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 | 0 |
1 | 1 | 0 | 1 | 0 | 1 |
1 | 1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | ? | ? |
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