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Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.
0. Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be
1007
1020
1024
1028
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