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0. If we use internal data forwarding to speed up the performance of A CPU (R1, R2 and R3 are registers and M[100] is a memory reference), then the sequence of operations R1 → M[100] M [100] → R2 M [100] → R3 can be replaced by
R1 → R3 R2 → M[100]
M[100] → R2 R1 → R2 R1 → R3
R1 → M[100] R2 → R3
R1 → R2 R1 → R3 R1 → M[100]
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