PREVIOUS YEAR SOLVED PAPERS - GATE 2020

16. Consider the language L = {an| n ≥ 0} ∪ { anbn | n ≥ 0} and the following statements.
I. L is deterministic context-free.
II. L is context-free but not deterministic context-free.
III. L is not LL(k) for any k.
Which of the above statements is/are TRUE?

  • Option : B
  • Explanation :
    Statement I - L = {an| n ≥ 0} ∪ { anbn | n ≥ 0}
                ↓             ↓
              Linear power      well know DCFL
    ∴ it is regular
    ∴ L = Regular ∪ DCFL {use the closure properties}
    L = DCLF
    Statement--III As we cannot write LL( k ) grammar, for any value of k, Hence statement III is correct.
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17. Consider the following statements.
I. Symbol table is accessed only during lexical analysis and syntax analysis.
II. Compilers for programming languages that support recursion necessarily need heap storage for memory allocation in the run-time environment.
III. Errors violating the condition ‘any variable must be declared before use’ are detected during syntax analysis.
Which of the above statements is/are TRUE?

  • Option : B
  • Explanation :
    Statement I – False, symbol table can be accessed during any phase of compiler.
    Statement II- False, For recursion support it is not necessarily be heap storage, as stack storage also supports recursion.
    Statement III – False, “Variable must be declared before use” are detected during semantic analysis.
    Hence, None of the statements is correct.
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18. For parameters a and b, both of which are ω(1), T(n)=T(n1/a)+1, and T(b)=1. Then T(n) is

  • Option : B
  • Explanation :

    ⇒ loga logbn
    ⇒ O(loga logbn)
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19. Consider an instruction:R0 ← R1 + R2.The following steps are used to execute it over the given data path. Assume that PC is incremented appropriately. The subscripts r and w indicate read and write operations, respectively.
1. R2r, TEMP1r, ALUadd, TEMP2w
2. R1r, TEMP1w
3. PCr, MARw, MEMr
4. TEMP2r, R0w
5. MDRr, IRw
Which one of the following is the correct order of execution of the above steps ?

  • Option : A
  • Explanation :
    Given steps:
    1. R2r, TEMP1r, ALUadd, TEMP2W
    2. R1r, TEMP1W
    3. PCr, MARW, MEMr
    4. TEMP2r, ROW
    5. MDRr. IRW
    Instruction fetch is first step to be done which is indicated by step 3 and 5

    Then instruction decoded by cu and then operand fetch should be performe
    D. If is indicated with step 2 and operand fetch and perform operation by step 1

    4. Now, write result operations should be performe
    D. It is indicated by step 4, as a result, should be in R0.
    Step4:

    Hence correct order of execution should be, 3, 5, 2, 1, 4
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20. Consider the following statements about process state transitions for a system using preemptive scheduling.
I. A running process can move to ready state.
II. A ready process can move to running state.
III. A blocked process can move to running state.
IV. A blocked process can move to ready state.
Which of the above statements are TRUE?

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GATE 2020