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Computer Organization And Architecture MCQ - Memory Hierarchy

86 Transferring data in blocks from the main memory to the cache memory enables an interleaved main memory unit to operate unit at its maximum speed.

Statement is true, main memory transfer the data in the form of block to cache and cache transfer the data in the form of words, so it enables the interleaved main memory unit to operate unit at maximum speed

87 A 4-ways set-associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB. The number of bits for the TAG field is ......................... .

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Question:

An 8KB direct-mapped write back cache is organized as multiple blocks, each of size 32 bytes. The processor generates 32 bit addresses. The cache controller maintains the tag…

A. 4864 bits
B. 6144 bits
C. 6656 bits
D. 5376 bits

Correct answer: D

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