Memory Hierarchy Q.74
A computer has a 256 Kbytes, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.
0. The number of bits in the tag field of an address is
- Option : C
- Explanation : Number of blocks = Cache-Size/Block-Size
= 256 KB/32 Bytes
= 213
Number of Sets = 213/4 = 211
Tag no. + Set no. + offset = 32
Tag + 11 + 5 = 32
Tag = 16 bit
