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Memory Hierarchy Q.55

0. In a k-way set associative cache, the cache is divided into v sets, each of which consists of k lines. The lines of a set are placed in sequence on after another. The lines in set s are sequenced before the lines in set (s + 1). The main memory blocks are numbered 0 onwards. The main memory block numbered ‘j’ must be mapped to any one of the cache lines from

  • Option : A
  • Explanation : When associativity is doubled, then the set offset will be effected, accordingly, the number of bits used for TAG comparator be effected. Width of set index decoder also will be effected when set offset is changed. Width of wag selection multiplexer will be effected when the block offset is changed. With of processor to main memory data bus is guaranteed to be NOT effected.
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