DLCC Q.55

0. The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent? The combinational circuit given below is implemented with two NDA gates

  • Option : C
  • Explanation : [ (a.b) '. (a.b) ' ] '= ((a.b)')' + ((a.b)')' = ( a.b)+ (a.b) =(a.b)
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