DLCC Q.50
0. To make the following circuit a tautology ? marked box should be
- Option : C
- Explanation : The output f = (x+x')+(y+y'). Starting derivation using 'f'. -->(x+x')+(y+y') -->(x+y)+(x'+y') -->(Already a known Input)+(x'+y') So, the unknown input is (x'+y'). This can be made by :- x and y fed into a NOT gate and then AND gate to become (x'+y'). So the answer is NAND gate.
