info@avatto.com
+91-9920808017
0. A JK flip-lop has its J input connected to logic level 1 and its input to the Q output. A clock pulse is fed to its clock input. The flip-lop will now
Change its state at each clock pulse
Go to state 1 and stay there
Go to state 0 and stay there
Retain its previous state
You must be logged in to post a comment.
Login with Facebook
Login with Google
Forgot your password?
Lost your password? Please enter your email address. You will receive mail with link to set new password.
Back to login
You must be logged in to post a comment.