Gate2017 ss Q52

0. The next state table of a 2-bit saturating up-counter is given below.
Q1Q0Q1+Q0+
0001
0110
1011
1111
The counter is built as a synchronous sequential circuit using T flip-flops. The expression for T1 and T0 are

  • Option : B
  • Explanation :
    Q1Q0Q1+Q0+T1T0
    000101
    011011
    101101
    111100
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