Gate2017 cs Q36
Initially, both Q0 and Q1 are set to 1 (before the 1 clock cycle). The outputs- A
Q0Q1 after the 3rd cycle are 11 and after the 4th cycle are 00 respectively
- B
Q0Q1 after the 3rd cycle are 11 and after the 4th cycle are 01 respectively
- C
Q0Q1 after the 3rd cycle are 00 and after the 4th cycle are 11 respectively
- D
Q0Q1 after the 3rd cycle are 01 and after the 4th cycle are 01 respectively
- Option : B
- Explanation :
After 3rd clock pulse :11 After 4th clock pulse: 01 Qt can be observed from the diagram that : Q0 Q1 after the 3rd cycle are 11 and after the 4th cycle are 01 Therefore, option B is correctCLK Q1 Q0 0 1 1 1 0 1 2 1 0 3 1 1 4 0 1
