Gate2020 cs Q11

11Consider the following statements.
I. Daisy chaining is used to assign priorities in attending interrupts.
II. When a device raises a vectored interrupt, the CPU does polling to identify the source of the interrupt.
III. In polling, the CPU periodically checks the status bits to know if any device needs its attention.
IV. During DMA, both the CPU and DMA controller can be bus masters at the same time.
Which of the above statements is/are TRUE?

Option : C
Explanation :
Statement 1: True, Daisy chaining assign non-uniform priorities in attending interrupts.
Statement 2: False, A vectored interrupt means, CPU knows the source of the interrupt.
Statement 3: True, polling technique makes CPU to periodically verity states bits and service for need
Statement 4: False: During DMA also, CPU will have master control over the bus. (OR) IOP (I/O processor) and CPU can be mastered but not at the same time.
Hence, I and III are true

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