December 2014 - Paper 3

1:  
A hierarchical memory system that uses cache memory has cache access time of 50 nano seconds, main memory access time of 300 nano seconds, 75% of memory requests are for read, hit ratio of 0.8 for read access and the write-through scheme is used. What will be the average access time of the system both for read and write requests ?
A.

157.5 n.sec.

B.

110 n.sec

C.

75 n.sec.

D.

82.5 n.sec

 
 

Option: A

Explanation :

Here read probability pr = 75% = 0.75
hit ratio of read = 08 
so read access time = 0.8*50 + (1-0.8)*(50+300) = 0.8*50 + 0.2*350 =40+70=110ns
read access and write through = pr*read access time +(1-pr)*memory access time
=0.75*110 + 0.25 * 300
=77.5 + 75 
= 157.5 ns
So Correct answer is A

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2:  

For switching from a CPU user mode to the supervisor mode following type of interrupt is most appropriate

A.

Internal interrupts

B.

External interrupts

C.

Software interrupts

D.

None of the above

 
 

Option: A

Explanation :

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3:  
In a dot matrix printer the time to print a character is 6 m:sec., time to space in between characters is 2 m.sec., and the number of characters ina line are 200. The printing speed of the dot matrix printer in characters per second and the time to print a character line are given by which of the following options?
A.

125 chars/second and 0.8 seconds

B.

250 chars/second and 0.6 seconds

C.

166 chars/second and 0.8 seconds

D.

250 chars/second and 0.4 seconds

 
 

Option: C

Explanation :

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rajiv said: (10:48am on Tuesday 16th June 2015)
answer is A : Time to print Char=6 msTime to print space=2 msIn one line 200 characters and 199 spaces between them doing some maths= 200*6 199*2=1598 ms1 line in 1598 ms i.e 200 characters in 1598 mstherefore in 1 sec =200/1598=.125 *1 ms=125 char/sec
samreen said: (7:32pm on Thursday 18th June 2015)
@rajiv,,where u got 199 can u plz tell me

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4:  
Match the following 8085 instructions with the flags:
 

List - I

        List - II

a. XCHG

 i. only carry flag is affected.

      b. SUB

ii.  no flags are affected.

      c. STC

iii. all flags other than carry flag are affected.

      d. DCR

iv. all flags are affected.

 

A.

a  b  c   d

iv  i   iii  ii

B.

a  b  c   d

iii  ii   i  iv

C.

a  b  c   d

ii  iii   i  iv

D.

a  b  c   d

ii  iv   i  iii

 
 

Option: D

Explanation :

XCHG xchanging value and not affect flag
SUB affect all flag 
STC affect only carry flag
DCR decrement register value and affect all flag except carry

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5:  

How many times will the following loop be executed?

          LXI    B, 0007 H
LOP: DCX  B 
          MOV  A,B
          ORA  C
          JNZ   LOP
A.

05

B.

07

C.

09

D.

00

 
 

Option: B

Explanation :

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