June 2015 - Paper 3

1:  

For the 8 - bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101. What is the data word that was read from memory?

A.

10011001

B.

00011001

C.

00111000

D.

11000110

 
 

Option: B

Explanation :

The Hamming Word initially calculated was:
bit number:

12

11

10

9

8

7

6

5

4

3

2

1

0

0

1

1

0

1

0

0

1

1

1

1

Doing an exclusive-OR of 0111 and 1101 yields 1010 indicating an error in bit 10 of the Hamming Word. Thus, the data word read from memory was 00011001.

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2:  

Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate for this microprocessor?

A.

8x106 bytes/sec

B.

4x106 bytes/sec

C.

16x106 bytes/sec

D.

4x109 bytes/sec

 
 

Option: B

Explanation :

Since minimum bus cycle duration = 4 clock cycles and bus clock = 8 MHz
Then, maximum bus cycle rate = 8 M / 4 = 2 M/s
Data transferred per bus cycle = 16 bit = 2 bytes
Data transfer rate per second = bus cycle rate * data per bus cycle = 2 M * 2 = 4 Mbytes/sec. = 4 x 10^6 bytes / sec

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3:  

The RST 7 instruction in 8085 microprocessor is equivalent to :

A.

CALL 0010  H

B.

CALL 0034  H

C.

CALL 0038  H

D.

CALL 003C  H

 
 

Option: C

Explanation :

The Table shows the vector addresses of all interrupts.

Instruction

HEX code

Vector address

RST 0

C7

0000H

RST 1

CF

0008H

RST 2

D7

0010H

RST 3

DF

0018H

RST 4

E7

0020H

RST 5

EF

0028H

RST 6

F7

0030H

RST 7

FF

0038H

 

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4:  

The equivalent hexadecimal notation for octal number 2550276 is :

A.

FADED

B.

AEOBE

C.

ADOBE

D.

ACABE

 
 

Option: C

Explanation :

binary equivalent of 2550276 is 010101101000010111110. now writing in pair of 4 bits and converting to hexadecimal it becomes AD0BE

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5:  

The CPU of a system having 1 MIPS execution rate needs 4 machine cycles on an average for executing an instruction. The fifty percent of the cycles use memory bus. A memory read/ write employs one machine cycle. For execution of the programs, the system utilizes 90 percent of the CPU time. For block data transfer, an IO device is attached to the system while CPU executes the background programs continuously. What is the maximum IO data transfer rate if programmed IO data transfer technique is used?

A.

500 Kbytes/sec

B.

2.2 Mbytes/sec

C.

125 Kbytes/sec

D.

250 Kbytes/sec

 
 

Option: D

Explanation :

CPU speed: 10^6 instructions/sec
1 CPU instruction = 4 machine cycles (average)
1 memory access (R/W) = 1 m/c cycle
CPU utilization = 90%
Programmed IO
Each byte transfer requires 4 cycles (instructions)

In status

Check status

Branch

R/W data in memory

Max. data transfer rate = CPU Speed / 4

= 10^6 / 4 = 250 Kbytes/sec

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