December 2015 - Paper 3

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3. December 2015
4. Paper 3

1:  

The three outputs x_1,x_2, x₃  from the 8x3 priority encoder are used to provide a vector address of the form 101x_1,x_2, x₃00. What is the second highest priority vector address in hexadecimal if the vector addresses are starting from the one with the highest priority?

A.	BC
B.	A4
C.	BD
D.	AC
	Answer Report Discuss
	Option: B Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

2:   What will be the output at PORT1 if the following program is executed?
MVI B, 82H
MOV A, B
MOV C, A
MVI D, 37H
OUT PORT1
HLT

A.	37H
B.	82H
C.	B9H
D.	00H
	Answer Report Discuss
	Option: B Explanation : In 8085 programming, the result of an operation is stored in the accumulator. So output is 82H. Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

3:   Which of the following 8085 microprocessor hardware interrupt has the lowest priority?

A.	RST 6.5
B.	RST 7.5
C.	TRAP
D.	INTR
	Answer Report Discuss
	Option: D Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

4:  

A dynamic RAM has refresh cycle of 32 times per msec. Each refresh operation requires 100 nsec and a memory cycle requires 250 nsec. What percentage of memory's total operating time is required for refreshes?

A.	0.64
B.	0.96
C.	2.00
D.	0.32
	Answer Report Discuss
	Option: D Explanation : in 1ms :  refresh = 32 times Memory cycle = 1ms/250ns   = 10 6 ns/250ns = 4000 times Therefore, % of refresh time  = (32 x 100ns)/(4000 x 250ns = 3200ns/1000000 x 100% = 0.32% Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

5:  

A DMA controller transfers 32-bit words to memory using cycle Stealing. The words are assembled from a device that transmits characters at a rate of 4800 characters per second. The CPU is fetching and executing instructions at an average rate of one million instructions per second. By how much will the CPU be slowed down because of the DMA transfer?

A.	0.06%
B.	0.12%
C.	1.2%
D.	2.5%
	Answer Report Discuss
	Option: B Explanation : The DMA combines one word from four consecutive characters (bytes) so we get 4800 chars/s = 4800 bytes/s = 1200 words/s (one word = 32 bits = 4 bytes)   If we assume that one CPU instruction is one word wide then 1 million instructions/s = 1 million words/s = 106 word/s   So we have 1200 words received during one second and (106 -1200) words processed by the CPU (while DMA is transferring a word, the CPU cannot fetch the instruction so we have to subtract the number of words transferred by DMA).   While DMA transfer CPU executes only 106  - 1200 = 998800 instructions [998800 / 106 ] * 100 = 99.88 % Slowdown = 100 - 99.88 = 0.12%   The CPU will be slowed down by 0.12%. Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

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