PREVIOUS YEAR SOLVED PAPERS - GATE 2020

46. Let R be the set of all binary relations on the set {2, 3}. Suppose a relation chosen from R at random. The probability that the chosen relation is reflex (round off to 3 decimal places) is ________.

  • Option : A
  • Explanation :
    No. of relation on A = 29
    No. of reflexive relation on A = 2(n2-n) = 2(32-3) = 26
    ∴ Probability (reflexive) = 26 / 29 = 1/8 = 0.125
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47. A direct mapped cache memory of 1 MB has a block size of 256 bytes. The cache has an access time of 3 ns and a hit rate of 94%. During a cache miss, it takes 20 ns to bring the first word of a block from the main memory, while each subsequent word takes 5 ns. The word size is 64 bits. The average memory access time in ns (round off to 1 decimal place) is _______.

  • Option : B
  • Explanation :
    Cache Memory = 1 MB
    Word size = 64 bit = 8 B
    Block size = 256 B
    Hit rate, x = 0.94 miss rate= 1-x = 0.06
    Cache access time, Tc = 3ns
    Number of words / Block = 256/8 = 32
    Using Hierarchical Approach,
    Tavg= ( x.Tc ) + (1-x)[ Tc + 1st word access time + remaining word access time]
    Tavg = (0.94 × 3) + (1 – 0.94) [3 + 20 + (31 × 5)]
    Tavg = 13.5 ns
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48. Consider the following grammar.
S → aSB | d
B → b
The number of reduction steps taken by a bottom-up parser while accepting string aaadbbb is ______ .

  • Option : B
  • Explanation :
    S → aSB
    → aaSBB [S → aSB]
    → aaaSBBB [S → aSB]
    → aaadBBB [S → d]
    → aaadbBB [B → b]
    → aaadbbB [B → b]
    → aaadbbb [B → b]
    Total 7 steps require
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49. If there are m input lines and n output for a decoder that is used to unique address a byte-addressable 1 KB RAM, then the minimum value of m + n is _____

  • Option : D
  • Explanation :
    Byte addressable 1 KB RAM
    ⇒ 210 bytes
    m = 10
    n = 2m
    m = 10, n = 1024
    so, m+n= 1024+ 10 = 1034
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50. A multiplexer is placed between a group of 32 register and an accumulator to regulate data movement such at that any given point in time the content of only one register will move to the accumulator. The minimum number of select lines needed for the multiplexer is ______ .

  • Option : A
  • Explanation :
    Gate2020 cs
    MUX: 2n inputs, n selection lines, 1 o/p
    2n = 32 ⇒ n = 5
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GATE 2020