Classical

Digital Logic - Combinational Circuits

16:  

A one-to-four line demultiplexer is to be implemented using a memory. How many bits must each word have ?

A.

1 bit

B.

2 bits

C.

4 bits

D.

8 bits

 
 

Option: A

Explanation :

2 select line A and B will work as address lines, so we have 4 addresses (or words)

Each word will have 4 bits so memory required is 4 x 4 = 16 bits

Click on Discuss to view users comments.

alina said: (1:57am on Sunday 28th May 2017)
t o represent four lines we have to use two bits.

Write your comments here:



17:   What logic function is produced by adding an inverter to the output of an AND gate ?
A. NAND
B. NOR
C. XOR
D. OR
 
 

Option: A

Explanation :

Click on Discuss to view users comments.

Write your comments here:



18:   Which of the following gates is known as coincidence detector ?
A. AND gate
B. OR gate
C. NOT gate
D. NAND gate
 
 

Option: A

Explanation :

Click on Discuss to view users comments.

Write your comments here:



19:   Which table shows the logical state of a digital circuit output for every possible combination of logical states in the inputs ?
A. Function table
B. Truth table
C. Routing table
D. ASCII table
 
 

Option: B

Explanation :

Click on Discuss to view users comments.

Write your comments here:



20:  

A positive AND gate is also a negative

A.

NAND gate

B.

NOR gate

C.

AND gate

D.

OR gate

 
 

Option: D

Explanation :

Truth Table For AND 

0 0 => 0
0 1 => 0
1 0 => 0
1 1 => 1

Now invert all values (as if you place inverters on the two inputs and the one output):

1 1 => 1
1 0 => 1
0 1 => 1
0 0 => 0

Click on Discuss to view users comments.

Write your comments here:






*********
X