The number of two input multiplexers required to construct a 210 input multiplexer is,
| A. | 31 |
| B. | 10 |
| C. | 127 |
| D. | 1023 |
|
Option: D Explanation : Click on Discuss to view users comments. Appasami said: (9:54pm on Sunday 27th May 2018)
512 256 128 64 32 16 8 4 2 1=1023. In Question, please change 210 to 2 Power 10=2^10
|
The full adder adds the Kth bits of two numbers to the
| A. | difference of the previous bits |
| B. | sum of all previous bits |
| C. | carry from ( K - 1 )TH bit |
| D. | sum of previous bit |
|
Option: C Explanation : Click on Discuss to view users comments. |
In the following question, match each of the items A, B and C on the left with an approximation item on the right
A. Shift register can be used 1. for code conversion
B. A multiplexer can be used 2. to generate memory slipto select
C. A decoder can be used 3. for parallel to serial conversion
4. as many to one switch
5. for analog to digital conversion
| A. | A B C 1 2 3 |
| B. | A B C 3 4 1 |
| C. | A B C 5 4 2
|
| D. | A B C 1 3 5 |
|
Option: B Explanation : Click on Discuss to view users comments. |
A full-adder is a logic circuit which can add two single order bits plus a carry in from a previous adder. Its incomplete truth table is given in the table below. The missing entry in the outputs for SUM and CARRY out are
|
Input |
Outputs |
||||
|
A |
A |
B |
Cin |
Sum |
CarryOUT |
|
0 |
0 |
0 |
0 |
0 |
0 |
|
0 |
0 |
0 |
1 |
1 |
0 |
|
0 |
0 |
1 |
0 |
1 |
0 |
|
0 |
0 |
1 |
1 |
0 |
1 |
|
1 |
1 |
0 |
0 |
1 |
0 |
|
1 |
1 |
0 |
1 |
0 |
1 |
|
1 |
1 |
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
1 |
? |
? |
| A. | 0 0 |
| B. | 0 1 |
| C. | 1 0 |
| D. | 1 1 |
|
Option: D Explanation : Click on Discuss to view users comments. mahmoud said: (4:52am on Thursday 5th April 2018)
SUM =0 , CARRY=10 ?!!
|
