Classical

Digital Logic - Sequential Circuits

11:   The ring counter is analogous to
A. Toggle switch
B. Latch
C. Stepping switch
D. J-K flip-flop
 
 

Option: C

Explanation :

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12:   In a digital counter circuit feedback loop is introduced to
A. Improve distortion
B. Improve stability
C. Reduce the number of input pulses to reset the counter
D. Asynchronous input and output pulses
 
 

Option: C

Explanation :

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13:   A J-K lip-lop has its J-input connected to logic level 1 and its input to the Q output pulse is fed to its clock input the flip-flop will now
A. Change its state at each clock pulse
B. Go to state 1 and stay there
C. Go to state 0 and stay there
D. Retain its present state
 
 

Option: A

Explanation :

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14:  

Which of the following conditions must be met to avoid race around problem ?

A.

Δ t < tp < T

B.

T > Δt > tp

C.

2 tp < Δt < T

D.

None of these

 
 

Option: B

Explanation :

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15:  

 Match List I with List II and select the correct answer form the codes given below the list

           List I                                                                          

A. A shift register can be                
B. A multiplexer                               
C. A decoder can                            
           

List II              
1.for parallel to serial conversion        
2.to generate memory can be used chip select
3.for parallel to serial conversion                                

                                                                            
CODES:
A B C

A.

3 1 2

B.

2 3 1

C.

1 3 2

D.

1 2  3 

 
 

Option: C

Explanation :

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