Computer Organization Architecture

Cache and main memory I/O interface Machine instructions and addressing modes Registers

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Computer Organization Architecture - Cache and main memory

21: Which of the following need extra hardware for DRAM refreshing ?

A.	8085
B.	Motorla-68000
C.	Both (a) and (b)
D.	None of these
	Answer Report Discuss
	Option: C Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

22: The idea of cache memory is based on

A.	The property of locality of reference
B.	The heuristic 90-10 rule
C.	The fact that only a small portion of a program is referenced relatively frequently
D.	None of these
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	Option: A Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

23: Property of locality of reference may fail, if a program has

A.	Many conditional jumps
B.	Many unconditional jumps
C.	Many operands
D.	Many Operators
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	Option: C Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

24:

What is the correct sequence of time delays that happen during a data transfer from a disk to memory?

A.	Seek time, access time, transfer time
B.	Seek time, latency time, transfer time
C.	Access time ,Latency time, transfer time
D.	Latency time, access time, transfer time
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	Option: B Explanation : Click on Discuss to view users comments. Write your comments here: Updating your Comments.. Updating your Comments..

25: How many RAM chips of size (256K x 1 bit) are required to build 1M Byte memory ?

A.	8
B.	12
C.	24
D.	32
	Answer Report Discuss
	Option: D Explanation : Click on Discuss to view users comments. chandan kumar said: (8:34pm on Thursday 4th July 2013) 1M=1024KAND I BYTE=8 BITHENCE 1024/256=4AND 8/1=8REQUIRED AND=8*4=32 Write your comments here: Updating your Comments.. Updating your Comments..

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