Computer Organization Architecture - I/O interface

1:   The 8085 microprocessor responds to the presence of an interrupt
A. As soon as the TRAP pin becomes 'LOW'
B. By checking the TRAP pin for 'high' status at the end of each instruction fetch
C. By checking the TRAP pin for 'high' status at the end of the execution of each instruction
D. By Checking the TRAP pin for 'high' status at regular intervals
 
 

Option: C

Explanation :

Click on Discuss to view users comments.

Write your comments here:



2:  

CPU has two modes privileged and non-privileged.In order to change the mode from privileged to non-privileged

A.

A hardware interrupt is needed

B.

A software interrupt is needed

C.

Either (a) or (b)

D.

A non-privileged instruction (which does not generate an interrupt) is needed

 
 

Option: B

Explanation :

A software interrupt is initiated by some program module which need  some CPU services, at that time the two modes can be interchanged. Hence (B) is correct option.

Click on Discuss to view users comments.

Write your comments here:



3:   The TRAP interrupt mechanism of the 8085 microposser executes
A. An RST by hardware
B. The instruction supplied by external device through the INTA signal
C. An instruction from memory location 20 H
D. None of these
 
 

Option: A

Explanation :

Click on Discuss to view users comments.

Write your comments here:



4:   Which of the following interrupts are unmaskable interrupts ?
A. RST 5.5
B. RST 7.5
C. TRAP
D. Both (a) and (b)
 
 

Option: C

Explanation :

Click on Discuss to view users comments.

Write your comments here:



5:   The address range to which I/O chip will respond is
A. 0000 H to FFFF H
B. 0000 H to 5FFF H
C. 4000 H to 5FFFF H
D. None of these
 
 

Option: B

Explanation :

Click on Discuss to view users comments.

Write your comments here:




Syllabus included in this section is-

  • Machine instructions and addressing modes
  • ALU and data-path
  • CPU control design
  • Memory interface
  • I/O interface (Interrupt and DMA mode)
  • Instruction pipelining
  • Cache and main memory
  • Secondary storage
  • Hardwired and Microprogrammed processor design
  • Instruction formats 
  • Addressing modes
  •  Memory types and organisation
  • Interfacing peripheral devices
  • Interrupts
  • Microprocessor architecture
  • Instruction set and Programming (8085, P-III/P-IV)
  • Microprocessor applications.

Various Search Terms used for this section are

  • Computer Organisation quiz questions with answers

  • Computer Organisation exam questions answers

  • Computer Organisation MCQ questions Answers

  • Computer Organisation MCQ

  • Computer Architecture quiz questions with answers

  • Computer Architecture exam questions answers

  • Computer Architecture MCQ questions Answers

  • Computer Architecture MCQ

This Section covers Multiple Choice Questions Answers in Computer Organisation and Architecture .Who can benefit - 

  • These Computer Organinsation MCQs can also be used by the students who are pursuing Bsc Computer Science.
  • Computer Architecture Questions Answers can also be used by BCA students for the preparation of their exams.
  • Any student who is pursuing Bsc in Information Technology can also use this Computer Organisation & Architecture mcq  section.
  •  MCA students can also prepare for their exams in Computer organisation and architecture .
  • Any undergraduate or postgraduate student who is seeking computer organisation objective type questions answers can use this section .
  • You can also get Computer organisation mcq pdf  from site.
  • You can also access Computer Organisation and Architectures Questions Answers EBook .