Extremely low power dissipation and low cost per gate can be achieved in:
A. | MOS ICs |
B. | CMOS ICs |
C. | TTL ICs |
D. | ECL ICs |
Option: B Explanation : Click on Discuss to view users comments. |
A. | EX-OR gate |
B. | AND gate |
C. | OR gate |
D. | NOR gate |
Option: D Explanation : Click on Discuss to view users comments. |
A. | Physical layer |
B. | Presentation layer |
C. | Network layer |
D. | Application layer |
Option: C Explanation : Click on Discuss to view users comments. |