Classical

Digital Logic - Combinational Circuits

21:  

A demultiplexer is used to

A.

Route the data from single input to one of many outputs

B.

Perform serial to parallel conversion   

C.

Both (a) & (b)

D.

Select data from several inputs and route it to single output

 
 

Option: C

Explanation :


22:   An OR gate can be imagined as
A. Switches connected in series
B. Switches connected in parallel
C. MOS transistors connected in series
D. None of these
 
 

Option: B

Explanation :


23:   Which combination of gates does not allow the implementation of an arbitrary boolean function?
A. OR gates and AND gates only
B. OR gates and exclusive OR gate only
C. OR gates and NOT gates only
D. NAND gates only
 
 

Option: A

Explanation :


24:  

How many full adders are required to construct an m-bit parallel adder ?

A.

m/2

B.

m-1

C.

m

D.

m+1

 
 

Option: B

Explanation :

We need an adder for every bit. So  we should need m full adders. A full adder adds a carry bit to two inputs and produces an output and a carry.
                 But the most significant bits can use a half adder, which differs from the full adder as in that it has no carry input, so we need m-1 full adders in m bit parllel adder.

 


25:   Parallel adders are
A. combinational logic circuits
B. sequential logic circuits
C. both (a) and (b)
D. None of these
 
 

Option: A

Explanation :




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