# Digital Logic - Combinational Circuits

61:

The number of two input multiplexers required to construct a 210 input multiplexer is,

 A. 31 B. 10 C. 127 D. 1023 Answer Report Discuss Option: D Explanation : Click on Discuss to view users comments. Write your comments here:
62:

The full adder adds the Kth bits of two numbers to the

 A. difference of the previous bits B. sum of all previous bits C. carry from ( K - 1 )TH bit D. sum of previous bit Answer Report Discuss Option: C Explanation : Click on Discuss to view users comments. Write your comments here:
63:

In the following question, match each of the items A, B and C on the left with an approximation item on the right

A. Shift register can be used              1. for code conversion

B. A multiplexer can be used             2. to generate memory slipto select

C. A decoder can be used                  3. for parallel to serial conversion

4. as many to one switch

5. for analog to digital conversion

 A. A   B   C 1   2   3 B. A   B   C 3   4   1 C. A   B   C 5   4   2 D. A   B   C 1   3   5 Answer Report Discuss Option: B Explanation : Click on Discuss to view users comments. Write your comments here:
64:

A full-adder is a logic circuit which can add two single order bits plus a carry in from a previous adder. Its incomplete truth table is given in the table below. The missing entry in the outputs for SUM and CARRY out are

 Input Outputs A A B Cin Sum CarryOUT 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 0 1 1 1 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 1 1 1 1 1 ? ?

 A. 0 0 B. 0 1 C. 1 0 D. 1 1 Answer Report Discuss Option: D Explanation : Click on Discuss to view users comments. Write your comments here:
65:

Extremely low power dissipation and low cost per gate can be achieved in:

 A. MOS ICs B. C MOS ICs C. TTL ICs D. ECL ICs Answer Report Discuss Option: B Explanation : Click on Discuss to view users comments. Write your comments here:

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