Classical

Digital Logic - Combinational Circuits

51:  

 For the circuit shown for AB = 00,  AB = 01, C, S values respectively are
find output

A.

0 , 0 and 0, 1

B.

0, 0 and 1, 0

C.

0, 1 and 0, 0

D.

1, 0 and 0, 0

 
 

Option: A

Explanation :


52:  

 What logic gate is represented by the circuit shown below?
Logic Circuit

A.

NAND

B.

NOR

C.

AND 

D.

EQUIVALENCE

 
 

Option: C

Explanation :


53:  

The circuit shown below is the

full adder

A.

Full adder

B.

Full subtractor

C.

Parity checker

D.

None of these

 
 

Option: A

Explanation :


54:  

 In the  following gate network which gate is redundant 

gate network
 

A.

Gate no. 1

B.

Gate no. 2

C.

Gate no. 3

D.

Gate no. 4

 
 

Option: B

Explanation :

Before Gate No. 4 being removed

Output, fequals equation wxyz

After Gate No. 4 being removed,

Output, equation xyz


55:  

The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?
nand gate circuit

A.

NOT

B.

OR

C.

AND

D.

XOR

 
 

Option: C

Explanation :

[ (a.b) '. (a.b) ' ] '= ((a.b)')' + ((a.b)')'
= ( a.b)+ (a.b)
=(a.b)




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