Digital Logic

1:

What is the minimum number of 2 input NAND gates required to implement the function
F = (x'+y') (z+w)

A.

6

B.

5

C.

4

D.

3

 

Answer : C

Explanation :

barani said: (7:10am on Friday 1st June 2018)
As it is 2 input NAND gates 3 gates are sufficient to design

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Option: A

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