Digital Logic

1:

in 2's complement addition , overflow

A.

is flagged whenever there is carry from sign bit addition

B.

cannot occue when a positive value is added to a negative value

C.

is flagged when the carries from sign bit and previous bit match

D.

none of these

 

Answer : D

Explanation :

Write your comments here:


Report Error
 

Option: A

Explanation : Explanation will come here. Explanation will come here. Explanation will come here. Explanation will come here. Explanation will come here.